SH-3 Internal Clock Frequency
Up to SH Family
Hello,
I'm trying to find out the internal clock frequency of a calculator with a SH-3 inside.
The crystal frequency is 14.7 MHz and PLL1 and divider1 are both set to x1 but the
multiplication ratio of PLL2 is unknown.
MOV.L #100000000,R0
L00: NOP
DT R0
BF L00
RTS
NOP
The execution of the test code above takes about 17 seconds. Is the internal
clock 14.7 MHz (PLL2 x1) or 29.4 MHz (PLL2 x2)? Thanks.
PLL2 should be defined by the input pins MD0, MD1 and MD2. Just measure the signal levels of those to see what PLL2 does.
Thanks for your reply, but the location of the MD pins is the problem.
Some pictures: http://picasaweb.google.com/naranjo.manuel/CASIO9860
Considering the speed of the test loop, I assume a multiplication ratio of x2, but I'm not really sure.

